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Silicon On Insulator SOI Technology

Silicon On Insulator  SOI  Technology Book
Author : O. Kononchuk,B.-Y. Nguyen
Publisher : Elsevier
Release : 2014-06-19
ISBN : 0857099256
Language : En, Es, Fr & De

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Book Description :

Silicon-On-Insulator (SOI) Technology: Manufacture and Applications covers SOI transistors and circuits, manufacture, and reliability. The book also looks at applications such as memory, power devices, and photonics. The book is divided into two parts; part one covers SOI materials and manufacture, while part two covers SOI devices and applications. The book begins with chapters that introduce techniques for manufacturing SOI wafer technology, the electrical properties of advanced SOI materials, and modeling short-channel SOI semiconductor transistors. Both partially depleted and fully depleted SOI technologies are considered. Chapters 6 and 7 concern junctionless and fin-on-oxide field effect transistors. The challenges of variability and electrostatic discharge in CMOS devices are also addressed. Part two covers recent and established technologies. These include SOI transistors for radio frequency applications, SOI CMOS circuits for ultralow-power applications, and improving device performance by using 3D integration of SOI integrated circuits. Finally, chapters 13 and 14 consider SOI technology for photonic integrated circuits and for micro-electromechanical systems and nano-electromechanical sensors. The extensive coverage provided by Silicon-On-Insulator (SOI) Technology makes the book a central resource for those working in the semiconductor industry, for circuit design engineers, and for academics. It is also important for electrical engineers in the automotive and consumer electronics sectors. Covers SOI transistors and circuits, as well as manufacturing processes and reliability Looks at applications such as memory, power devices, and photonics

CMOS VLSI Engineering

CMOS VLSI Engineering Book
Author : James B. Kuo,Ker-Wei Su
Publisher : Springer Science & Business Media
Release : 2013-04-17
ISBN : 1475728239
Language : En, Es, Fr & De

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Book Description :

Silicon-On-Insulator (SOI) CMOS technology has been regarded as another major technology for VLSI in addition to bulk CMOS technology. Owing to the buried oxide structure, SOI technology offers superior CMOS devices with higher speed, high density, and reduced second order effects for deep-submicron low-voltage, low-power VLSI circuits applications. In addition to VLSI applications, and because of its outstanding properties, SOI technology has been used to realize communication circuits, microwave devices, BICMOS devices, and even fiber optics applications. CMOS VLSI Engineering: Silicon-On-Insulator addresses three key factors in engineering SOI CMOS VLSI - processing technology, device modelling, and circuit designs are all covered with their mutual interactions. Starting from the SOI CMOS processing technology and the SOI CMOS digital and analog circuits, behaviors of the SOI CMOS devices are presented, followed by a CAD program, ST-SPICE, which incorporates models for deep-submicron fully-depleted mesa-isolated SOI CMOS devices and special purpose SOI devices including polysilicon TFTs. CMOS VLSI Engineering: Silicon-On-Insulator is written for undergraduate senior students and first-year graduate students interested in CMOS VLSI. It will also be suitable for electrical engineering professionals interested in microelectronics.

Silicon on Insulator Technology Materials to VLSI

Silicon on Insulator Technology  Materials to VLSI Book
Author : J.-P. Colinge
Publisher : Springer Science & Business Media
Release : 2004-02-29
ISBN : 9781402077739
Language : En, Es, Fr & De

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Book Description :

Silicon-on-Insulator Technology: Materials to VLSI, Third Edition, retraces the evolution of SOI materials, devices and circuits over a period of roughly twenty years. Twenty years of progress, research and development during which SOI material fabrication techniques have been born and abandoned, devices have been invented and forgotten, but, most importantly, twenty years during which SOI Technology has little by little proven it could outperform bulk silicon in every possible way. The turn of the century turned out to be a milestone for the semiconductor industry, as high-quality SOI wafers suddenly became available in large quantities. From then on, it took only a few years to witness the use of SOI technology in a wealth of applications ranging from audio amplifiers and wristwatches to 64-bit microprocessors. This book presents a complete and state-of-the-art review of SOI materials, devices and circuits. SOI fabrication and characterization techniques, SOI CMOS processing, and the physics of the SOI MOSFET receive an in-depth analysis. Silicon-on-Insulator Technology: Materials to VLSI, Third Edition, also describes the properties of other SOI devices, such as multiple gate MOSFETs, dynamic threshold devices and power MOSFETs. The advantages and performance of SOI circuits used in both niche and mainstream applications are discussed in detail. The SOI specialist will find this book invaluable as a source of compiled references covering the different aspects of SOI technology. For the non-specialist, the book serves an excellent introduction to the topic with detailed, yet simple and clear explanations. Silicon-on-Insulator Technology: Materials to VLSI, Third Edition is recommended for use as a textbook for classes on semiconductor device processing and physics at the graduate level.

Integration of Single Photon Avalanche Diodes in Fully Depleted Silicon on Insulator Technology

Integration of Single Photon Avalanche Diodes in Fully Depleted Silicon on Insulator Technology Book
Author : Tulio Chaves De Albuquerque
Publisher :
Release : 2019
ISBN :
Language : En, Es, Fr & De

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Book Description :

This work aims at the design, simulation, modelling and electrical characterization of Single Photon Avalanche Diodes (SPAD) in an advanced Fully Depleted Silicon on Insulator (FDSOI) technology. SPADs are PN junctions reversed bias above breakdown voltage, operating in the so-called Geiger mode. Such an implementation should provide an intrinsic monolithic integration of those devices, along with their mandatory associated electronics, thanks to the buried oxide layer present in that technology, optimizing fill factor. Due to its high sensitivity, SPAD are useful for several applications, such as Time of Flight (ToF) and Fluorescence Lifetime Imaging Microscopy (FLIM) measurements, as well as the detection of charged particles, in high-energy physics domain. The designed cells follow the main design rules imposed by the foundry and present variations in aspect as integration zone, geometry, guard distance and quenching circuit. TCAD simulations were performed in order to estimate some of the SPAD main Figures of Merit. Several avalanche and carrier generation models were studied for better adapting the simulated model to the actual fabricated devices. Electrical characterizations were realized for estimating important parameters such as breakdown voltage, Dark Count Rate (DCR) and electroluminescence response. Although the obtained results are still poor when compared to State-of-the-Art, its feasibility was demonstrated and can be used as a proof of concept, at the same time that improvements are proposed.

Silicon on Insulator Technology and Devices 13

Silicon on Insulator Technology and Devices 13 Book
Author : George K. Celler,Sorin Cristoloveanu
Publisher : The Electrochemical Society
Release : 2007-01-01
ISBN : 1566775531
Language : En, Es, Fr & De

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Book Description :

This issue of ESC Transactions covers recent significant advances in SOI technologies. It will be of interest to materials and device scientists, as well as to process and applications oriented engineers. Several keynote papers introduce and review the main topics. This is followed by contributed papers covering the latest research and implementation results.

Silicon on Insulator Technology

Silicon on Insulator Technology Book
Author : J.-P. Colinge
Publisher : Springer Science & Business Media
Release : 1997-09-30
ISBN : 9780792380078
Language : En, Es, Fr & De

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Book Description :

Silicon-on-Insulator Technology: Materials to VLSI, 2nd Edition describes the different facets of SOI technology. SOI chips are now commercially available and SOI wafer manufacturers have gone public. SOI has finally made it out of the academic world and is now a big concern for every major semiconductor company. SOI technology has indeed deserved serious recognition: high-temperature (400°C), extremely rad-hard (500 Mrad(Si)), high-density (16 Mb, 0.9-volt DRAM), high-speed (several GHz) and low-voltage (0.5 V) SOI circuits have been demonstrated. Strategic choices in favor of the use of SOI for low-voltage, low-power portable systems have been made by several major semiconductor manufacturers. Silicon-on-Insulator Technology: Materials to VLSI, 2nd Edition presents a complete and state-of-the-art review of SOI materials, devices and circuits. SOI fabrication and characterization techniques, SOI device processing, the physics of the SOI MOSFET as well as that of SOI other devices, and the performances of SOI circuits are discussed in detail. The SOI specialist will find this book invaluable as a source of compiled references covering the different aspects of SOI technology. For the non-specialist, the book serves as an excellent introduction to the topic with detailed, yet simple and clear explanations. Silicon-on-Insulator Technology: Materials to VLSI, 2nd Edition is recommended for use as a textbook for classes on semiconductor device processing and physics. The level of the book is appropriate for teaching at both the undergraduate and graduate levels. Silicon-on-Insulator Technology: Materials to VLSI, 2nd Edition includes the new materials, devices, and circuit concepts which have been devised since the publication of the first edition. The circuit sections, in particular, have been updated to present the performances of SOI devices for low-voltage, low-power applications, as well as for high-temperature, smart-power, and DRAM applications. The other sections, such as those describing SOI materials, the physics of the SOI MOSFET and other devices have been updated to present the state of the art in SOI technology.

Mechanism of Floating Body Effect Mitigation Via Cutting Off Source Injection in a Fully depleted Silicon on insulator Technology Project Supported by the National Natural Science Foundation of China Grant Nos 61376109 61434007 and 61176030 and the Advanced Research Project of National University of Defense Technology China Grant No 0100066314001

Mechanism of Floating Body Effect Mitigation Via Cutting Off Source Injection in a Fully depleted Silicon on insulator Technology Project Supported by the National Natural Science Foundation of China  Grant Nos  61376109  61434007  and 61176030  and the Advanced Research Project of National University of Defense Technology  China  Grant No  0100066314001   Book
Author : N.A
Publisher :
Release : 2016
ISBN :
Language : En, Es, Fr & De

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Book Description :

Abstract: In this paper, the effect of floating body effect (FBE) on a single event transient generation mechanism in fully depleted (FD) silicon-on-insulator (SOI) technology is investigated using three-dimensional technology computer-aided design (3D-TCAD) numerical simulation. The results indicate that the main SET generation mechanism is not carrier drift/diffusion but floating body effect (FBE) whether for positive or negative channel metal oxide semiconductor (PMOS or NMOS). Two stacking layout designs mitigating FBE are investigated as well, and the results indicate that the in-line stacking (IS) layout can mitigate FBE completely and is area penalty saving compared with the conventional stacking layout.

Fully Depleted SOI CMOS Circuits and Technology for Ultralow Power Applications

Fully Depleted SOI CMOS Circuits and Technology for Ultralow Power Applications Book
Author : Takayasu Sakurai,Akira Matsuzawa,Takakuni Douseki
Publisher : Springer Science & Business Media
Release : 2007-02-01
ISBN : 0387292187
Language : En, Es, Fr & De

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Book Description :

Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding.

Silicon on Insulator Technology and Devices 14

Silicon on Insulator Technology and Devices 14 Book
Author : Yasuhisa Omura
Publisher : The Electrochemical Society
Release : 2009-05
ISBN : 1566777127
Language : En, Es, Fr & De

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Book Description :

This issue of ECS Transactions contains papers on silicon-on-insulator subjects including devices, device physics, modelling, simulations, microelectronics, photonics, nano-technology, integrated circuits, radiation hardness, material characterization, reliability, and sensors

Electrical Characterization of Silicon on Insulator Materials and Devices

Electrical Characterization of Silicon on Insulator Materials and Devices Book
Author : Sorin Cristoloveanu,Sheng Li
Publisher : Springer Science & Business Media
Release : 1995-06-30
ISBN : 9780792395485
Language : En, Es, Fr & De

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Book Description :

Silicon on Insulator is more than a technology, more than a job, and more than a venture in microelectronics; it is something different and refreshing in device physics. This book recalls the activity and enthu siasm of our SOl groups. Many contributing students have since then disappeared from the SOl horizon. Some of them believed that SOl was the great love of their scientific lives; others just considered SOl as a fantastic LEGO game for adults. We thank them all for kindly letting us imagine that we were guiding them. This book was very necessary to many people. SOl engineers will certainly be happy: indeed, if the performance of their SOl components is not always outstanding, they can now safely incriminate the relations given in the book rather than their process. Martine, Gunter, and Y. S. Chang can contemplate at last the amount of work they did with the figures. Our SOl accomplices already know how much we borrowed from their expertise and would find it indecent to have their detailed contri butions listed. Jean-Pierre and Dimitris incited the book, while sharing their experience in the reliability of floating bodies. Our families and friends now realize the SOl capability of dielectrically isolating us for about two years in a BOX. Our kids encouraged us to start writing. Our wives definitely gave us the courage to stop writing. They had a hard time fighting the symptoms of a rapidly developing SOl allergy.

Micro and Nanoelectronics

Micro  and Nanoelectronics Book
Author : Tomasz Brozek
Publisher : CRC Press
Release : 2014-10-29
ISBN : 1482214911
Language : En, Es, Fr & De

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Book Description :

Micro- and Nanoelectronics: Emerging Device Challenges and Solutions presents a comprehensive overview of the current state of the art of micro- and nanoelectronics, covering the field from fundamental science and material properties to novel ways of making nanodevices. Containing contributions from experts in both industry and academia, this cutting-edge text: Discusses emerging silicon devices for CMOS technologies, fully depleted device architectures, characteristics, and scaling Explains the specifics of silicon compound devices (SiGe, SiC) and their unique properties Explores various options for post-CMOS nanoelectronics, such as spintronic devices and nanoionic switches Describes the latest developments in carbon nanotubes, iii-v devices structures, and more Micro- and Nanoelectronics: Emerging Device Challenges and Solutions provides an excellent representation of a complex engineering field, examining emerging materials and device architecture alternatives with the potential to shape the future of nanotechnology.

Terrestrial Radiation Effects in ULSI Devices and Electronic Systems

Terrestrial Radiation Effects in ULSI Devices and Electronic Systems Book
Author : Eishi H. Ibe
Publisher : John Wiley & Sons
Release : 2014-11-26
ISBN : 1118479327
Language : En, Es, Fr & De

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Book Description :

This book provides the reader with knowledge on a wide variety of radiation fields and their effects on the electronic devices and systems. The author covers faults and failures in ULSI devices induced by a wide variety of radiation fields, including electrons, alpha-rays, muons, gamma rays, neutrons and heavy ions. Readers will learn how to make numerical models from physical insights, to determine the kind of mathematical approaches that should be implemented to analyze radiation effects. A wide variety of prediction, detection, characterization and mitigation techniques against soft-errors are reviewed and discussed. The author shows how to model sophisticated radiation effects in condensed matter in order to quantify and control them, and explains how electronic systems including servers and routers are shut down due to environmental radiation. Provides an understanding of how electronic systems are shut down due to environmental radiation by constructing physical models and numerical algorithms Covers both terrestrial and avionic-level conditions Logically presented with each chapter explaining the background physics to the topic followed by various modelling techniques, and chapter summary Written by a widely-recognized authority in soft-errors in electronic devices Code samples available for download from the Companion Website This book is targeted at researchers and graduate students in nuclear and space radiation, semiconductor physics and electron devices, as well as other areas of applied physics modelling. Researchers and students interested in how a variety of physical phenomena can be modelled and numerically treated will also find this book to present helpful methods.

Design for Manufacturability and Statistical Design

Design for Manufacturability and Statistical Design Book
Author : Michael Orshansky,Sani Nassif,Duane Boning
Publisher : Springer Science & Business Media
Release : 2007-10-28
ISBN : 0387690115
Language : En, Es, Fr & De

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Book Description :

Design for Manufacturability and Statistical Design: A Comprehensive Approach presents a comprehensive overview of methods that need to be mastered in understanding state-of-the-art design for manufacturability and statistical design methodologies. Broadly, design for manufacturability is a set of techniques that attempt to fix the systematic sources of variability, such as those due to photolithography and CMP. Statistical design, on the other hand, deals with the random sources of variability. Both paradigms operate within a common framework, and their joint comprehensive treatment is one of the objectives of this book and an important differentation.

Transient Floating Body Effects for Memory Applications in Fully Depleted SOI MOSFETs

Transient Floating Body Effects for Memory Applications in Fully Depleted SOI MOSFETs Book
Author : Maryline Bawedin
Publisher : Presses univ. de Louvain
Release : 2007
ISBN : 9782874630880
Language : En, Es, Fr & De

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Book Description :

Memory devices based on floating-body effects (FBE) in Silicon-on-Insulator (SOI) technology are among the most promising candidates for sub-100nm and low power Dynamic Random Access Memory (DRAM). This new type of DRAMs, called Zero-Capacitor RAM (Z-RAM), uses only one transistor in partially-depleted (PD) SOI technology and takes advantage of FBE which have been considered as parasitic phenomena until now. The Z-RAM programming principles are based on the threshold voltage VTH variations induced by the excess or lack of majority carriers in the floating body. In this dissertation, a new floating-body effect, the Transient Floating Body Potential Effect (TFBPE), based on the body majority carriers non-equilibrium and on the dual dynamic gate coupling in standard fully-depleted (FD) SOI MOSFETs is presented for the first time. The TFBPE occurs in a specific gate bias range and can induce strong hysteresis of the gate and drain current characteristics although the FD SOI transistors are usually known to be immune against the FBE and their aftermaths. Adapted from the same physics principles as in the drain current hysteresis, that we called the Meta-Stable Dip (MSD) effect, a new concept of one-transistor capacitor-less memory was also proposed, the Meta-Stable DRAM (MSDRAM) which is dedicated for double-gate operations. All the experimental results and physics interpretations were supported by 2D numerical simulations. A 1D semi-analytical model of the body potential for non-equilibrium states was also proposed. For the first time, this original body-potential model takes into account the majority carriers density variations, i.e., the quasi-Fermi level non-equilibrium versus a transient gate voltage scan in a FD MOS device.